R&D Engineering, Staff Engineer

Analog Design Analysis and Sign-off Team
You will be part of an R&D team developing hyper-convergent analog design analysis and sign-off platform. We are looking for an engineer with practical and theoretical knowledge in this area to contribute to the team. You will work with a team to design workflows for analog design analysis, characterization, model generation, result analytics and visualization.   
You will be involved in all stages of development including:

• Architecture: define of workflow and specifications for details.
• Simulation control and job distribution: design flow on running/controlling simulation for generating library characterization results.
• Analysis and visualization of results: Result analysis and visualization to assist prediction, outlier detection and circuit debugging. 

You have an MSc in Electrical or Computer Engineering.
Due to the cross disciplinary nature of this position, key qualifications include one or more of the following:

• Analog – background in simulation of Transistor Level circuit.
• Data analysis – experience with ML learning
• Computer Language – C++, Python
• GUI framework - QT, PySide

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.